1. Field of the Invention
The present invention relates to a DC/AC converter that converts a direct current into an alternating current and supplies alternating current power to a load.
2. Description of the Related Art
In an inverter circuit that composes a DC/AC converter from a bridge circuit such as a half-bridge circuit and a full-bridge circuit, and supplies power to a load, when switching elements such as MOSFETs which compose the bridge circuit and are connected in series in a longitudinal direction are turned on simultaneously, a pass-through current flows through the bridge circuit, and the switching elements are broken.
For the purpose of preventing the switching elements from being turned on simultaneously, in usual, there is known a method of providing a dead time to a gate drive signal for driving the switching elements. However, by this method, the switching elements cannot be prevented from being turned on simultaneously in the case where noise is superimposed on the gate drive signal.
Japanese Patent Laid-Open Publication No. 2001-258268 (Patent Publication 1) discloses a half-bridge-type inverter circuit that prevents the switching elements from being turned on simultaneously by the noise.
This inverter circuit includes: a half-bridge-type switching circuit including a high-side switching element and a low-side switching element; a drive circuit that outputs an output signal driving the switching circuit and having a dead time period provided therein; a high-side dead time control circuit and a low-side dead time control circuit, each of which creates the dead time period from an input signal of the drive circuit; a pulse generator that generates a set output signal and a reset output signal from an output of the high-side dead time control circuit; a level shift circuit that boosts the set output signal and the reset output signal; a pulse filter circuit that allows passage of the set output signal and the reset output signal, of which pulse width has a fixed value or more; and an output circuit that outputs a high-side output signal by the set output signal and reset output signal from the pulse filter circuit, and an output circuit that outputs a high-side output signal by an output of the low-side dead time control circuit. Then, when a pulse width of the output of the high-side dead time control circuit is narrow, and the reset output signal of the pulse generator is not outputted, the pulse filter circuit does not allow the passage of the set output signal. With such a configuration, the inverter circuit of Patent Publication 1 prevents both of the switching elements from being turned on simultaneously.